Review: 5/5 lanes pass. 160/160 tests, tsc clean, M1 COMPLETE — verified live: reference factory ships melt, commission queue advances with standing orders, SCREEN's new artifact passes respond item-specifically (block 0.46 from bricks). Contracts v3 (granted): EntityState.scrammed, SimSnapshot.commissionQueue, MachineDef.coolPerTick, setRecipeAt command, Sim.save/load, ScreenFX.frame(t, snap), BeltItem.id hardened required, MachineDef.color re-ruled as chassis/body. main.ts: passes snapshot to screen.frame; dev __fktryDemo() builds reference factory. happy-dom ACTUALLY installed this time (round-2 grant never landed; UI caught it). Rulings: bandwidth units are per-second (SIM converts); heat retune ordered (nothing can currently overheat - heatPerTick < ambient cooling); validator test moves to data/; RENDER's color deviation approved as the ruling; scram wipe 3 frames; REMOVE button approved. Round 3 orders in all lane docs. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
214 lines
13 KiB
Markdown
214 lines
13 KiB
Markdown
# LANE-DATA — content, recipes, balance, and canon-keeping
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You are an Opus 4.8 executor on the DATA lane of FKTRY. Read `../MASTERPLAN.md` and
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`../CONTRACTS.md` first. Your bible is `../../docs/FKTRY_LORE.md` — you are its
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transcriber into machine-readable canon. When the codex and convenience disagree, the
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codex wins; when the codex is silent, invent IN ITS VOICE and note what you invented.
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**Mission:** every item, machine, recipe, tech, and commission as clean JSON, plus the
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validator that keeps five parallel lanes from drowning in dangling ids. Content should
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light up in-game with zero code changes from other lanes.
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**Owned paths:** `data/**` (the validator now lives at `data/validate.test.ts`;
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the old `src/sim/data-validate.test.ts` exception is closed — round 3 moves it).
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**Never touch:** contracts, main.ts, other lanes' code. Schema changes are CONTRACT
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REQUESTs.
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**Standing rules (all rounds):**
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- Ids: kebab-case matching codex names (`chroma-slurry`, `mosh-reactor`). `codex`
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field points at the lore doc section (`"3:melt"` = §3, MELT entry).
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- Balance philosophy: absurd flavor, honest math. Ratios should create real routing
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pressure (byproducts you must deal with, not vent). Steal shamelessly from the
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doc's real numbers (era efficiency multipliers, 4:2:0 = half the chroma, GOP
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cadences).
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- Never delete an id other lanes may reference mid-round — deprecate in NOTES first.
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---
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## CURRENT ORDERS — Round 3 (goal: heat that matters, deeper economy)
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Round 2 review: the bloom-concentrate grep-before-delete and the fault-injection
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discipline are exactly the standard. Both your cross-lane asks are RULED:
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**(1) Units: per-second.** `gen`/`draw` are per second, `stored` is
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bandwidth-seconds; SIM converts their integration this round — your `bufferCap: 240`
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= 8 seconds of a 30 deficit, as you intended. **(2) Cooling:** `coolPerTick?` granted
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in v3 (sim default 0.004); SIM wires it. Your SIM's-test-is-red flag was correct
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mid-round and self-resolved at HEAD (their landing fixed it) — the stash-and-rerun
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diagnostic was the right move. Ownership RULING: `data-validate.test.ts` moves to
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`data/validate.test.ts` (git mv, yours — vitest picks it up there; `src/sim/**`
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returns fully to SIM).
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1. **The validator move** above, first, so the tree is clean.
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2. **Heat retune, the headline**: today NOTHING can overheat — every `heatPerTick`
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you authored is below the 0.004 ambient cooling, so heat is decorative. With
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`coolPerTick` yours to set per machine: hit SIM's suggested feel — software
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decoder throttles after ~10s of continuous load, scrams ~13-15s, full duty cycle
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~25s; ASIC stays incapable of heat. Show the arithmetic in CANON-DELTA (per-tick
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vs per-second — mind the units ruling). Give the hex-splicer a lesser fever.
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Coordinate with SIM's reference-factory v3 via NOTES — your numbers decide
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whether their layout survives.
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3. **Buffer economy check** under the units ruling: is 240 (8s) still your intent
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now that it's true? One tank should cover one decoder scram — verify against your
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retuned cycle, adjust, show working.
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4. **ASIC COOLER spec'd** in CANON-DELTA (the codex names it, §2 "vented by ASIC
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coolers"): item/machine entry + intended adjacency mechanic, data authored but
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recipes gated behind a `broadcast`-era tech node — the MECHANIC stays deferred
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until SIM builds auras (M4); the data existing first is fine and the validator's
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FORWARD_CANON pattern covers it.
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5. **Reel + broadcast era tech nodes**: research costs in analog packs; unlocks
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field-loom/telecine recipe families you already authored.
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6. **Muxer + moov brain sub-lines** (§7): `stsz-ledger`, `stco-map`, `stts-metronome`,
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`stss-keyring` items + assembly recipes converging on a `moov-brain` →
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`mux-container` endgame recipe on the muxer. This is M4's rocket — data lands
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first, mechanics later. Muxer machine entry if you don't have one.
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**Definition of done:** validator green from its new home; a software decoder
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demonstrably overheats in SIM's tests using YOUR numbers (coordinate — their DoD
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depends on your retune); CANON-DELTA carries the arithmetic; FORWARD_CANON pruned of
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anything that gained a recipe.
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---
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## NOTES (append-only log, newest at bottom)
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```
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### Round N — YYYY-MM-DD — [your model]
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SHIPPED: / DECISIONS: / INVENTED: / BLOCKED/BROKEN: / CONTRACT REQUEST: / NEXT:
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```
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### Round 1 — 2026-07-17 — Opus 4.8
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SHIPPED:
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- Validator `src/sim/data-validate.test.ts`, 28 tests. Fault-injected a recipe with a
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dangling item + a machine that doesn't list it — both caught by id and named. It is
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not a test that only knows how to pass.
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- items 9 → 36, machines 7 → 21, recipes 4 → 35, tech 0 → 17, commissions 1 → 10.
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- Verified: `tsc` clean, `vitest run` 52/52 green (LANE-SCREEN's 24 included), and the
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live dev build boots with no console errors. All 21 machines appear in LANE-UI's
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build bar with zero code changes from them.
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DECISIONS:
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- **All four seed recipe ids kept alive** (`extract-mdat`, `demux-ore`, `quantize`,
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`mosh`) so nothing dangles for a lane mid-round. `mosh` keeps its id but is rewired
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to canon: `gop-crate 1 → melt 3 + anchor-slab 1`. The winched-out I-frame is
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recovered (§4 mosh reactor: "recoverable — sell it!"), so slabs circulate and delta
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wafers are what actually burns. Net economy: 6 wafers → 3 melt.
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- `quantize` left at the seed's exact ratio so the M1 chain stays easy to build.
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- **M1 chain is longer than the masterplan says — please rule on this.** My orders
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spell out `slab + wafers → gop-crate` and `gop-crate → mosh`, but MASTERPLAN M1
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describes extractor → belts → demuxer → quantizer → mosh → shipper (seven machines).
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Those can't both be true: reaching a crate needs dct-press (slab), p-caster (wafers)
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and gop-assembler in between. I followed the orders since they're the more specific
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and more recent instruction, and all three run fine as generic crafters. If M1 must
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stay at seven machines, say so and I'll add a shortcut `mosh-raw` recipe next round
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rather than weaken the canon path.
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- Machine params that the codex describes as dials (quantizer Q, subsampler grade taps,
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GOP cadence templates) are modelled as **separate recipes per setting**, not as a
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per-entity parameter. Cheapest thing that works against the current contract; if SIM
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ever wants a real dial, that's a contract change, not a data change.
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- Two absurd-but-honest ratios, as ordered: `assemble-gop-i-only` burns 8 premium slabs
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for 1 crate (I-only genuinely is the worst cadence — the joke balances itself, nobody
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sane builds it), and `pan-speckle` takes 40 HF DUST for 1 speckle (§3 says "panned
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like gold", so it's priced like gold panning). Both give hf-dust real sinks.
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INVENTED (codex is silent; written in its voice — kill any of these if you disagree):
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- `press-anchor-slab` on the DCT PRESS — the press run in reverse is an IDCT, i.e. a
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complete picture. Consistent with the field loom and telecine puller, which the codex
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explicitly runs backwards. This is where I-frames come from.
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- Items `color-plate` (the demosaicer's "full-color sheet", §4) and `v-hold-roll`
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(bottled from the §1 Broadcast Shelf v-hold faults, so the ANALOG PACK's "combing +
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v-hold roll + static" triptych maps to three real items).
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- Machines `artifact-bottler` (§2 calls the packs "a bottled artifact triptych" but
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names no bottling plant) and `lane-splitter` (contract has `kind: 'splitter'` and
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belts need routing; the codex only ever calls the DEMUXER "the first splitter").
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BLOCKED/BROKEN: nothing blocked. Known-incomplete, deliberately:
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- Bloom is one grade, not the graded 1-5 line §3 sells by intensity.
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- `container-pack` / `cinema-pack` / `mosquito-swarm` / `gibbs-wraith` exist as items
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with no recipe — forward canon, per orders. The validator's reachability test has an
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explicit FORWARD_CANON allowlist so these four can't hide a real dangling id; delete
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entries from it as recipes land.
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- `stream-hex-splicing` costs container-packs nothing currently produces. Intentional
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dead-end until the moov/container line exists (§6 heists).
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CONTRACT REQUEST: `MachineDef.heatPerTick?: number` — the SOFTWARE DECODER is
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`kind: 'power'`, and power machines carry no recipes, but `RecipeDef.heat` is the only
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heat hook in the contract. So the one machine the codex defines *by* its heat (§4:
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"decodes ANYTHING, at any temperature") has no way to declare it. It's shipped as a
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plain 45-gen power machine and is currently strictly better than the ASIC, which is
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backwards. Alternative if you prefer no contract churn: let power machines run a
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recipe with empty outputs — but I'd rather not put `outputs: {}` in the data, and my
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validator rejects it today.
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NEXT (Round 2 candidates, not self-assigned): bloom grades 1-5 as real items; the
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container line (moov shard / offset ribbon / sync key → CONTAINER PACK) which unblocks
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the hex splicer; mosquito traps so `vaporwave-sunset` becomes shippable; buffer-tank
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and muxer data; reel + broadcast era tech nodes.
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### Round 2 — 2026-07-17 — Opus 4.8
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SHIPPED: all 7 orders. `data/CANON-DELTA.md`; colour + flavor on all 21 machines;
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heat economy; `bufferCap`; commission queue with 3 standing orders; container line;
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bloom grades 1-5. items 36 → 44, machines 21, recipes 35 → 44, tech 17 → 19,
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commissions 10 → 14. Validator 28 → 36 tests.
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- Verified: my 36 pass; **every other lane's suite is green** (140/141 total — the one
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failure is SIM's, see BLOCKED). Live build: 21/21 machines art-directed with zero
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gaps, my hexes confirmed on the real DOM swatches (ASIC `rgb(185,190,196)`, software
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decoder `rgb(110,58,52)`), no console errors, fax opens on FIRST TASTE with DUST
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ALLOWANCE next in tray.
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- Fault-injected all six new checks (missing colour, absurd heatPerTick, buffer with no
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cap, non-buffer with a cap, wrong queue head, standing order wanting live mosquitoes)
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— all six failed by name, then restored. Same standard as round 1.
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DECISIONS:
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- **`bloom-concentrate` kept, not replaced.** It is now the raw ungraded draw-off that
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feeds grading. I was about to retire it for the grade-1..5 line until I grepped:
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LANE-SCREEN hardcodes it in `src/screen/corruptionMap.ts:54` and its test. Deleting it
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would have broken their suite mid-round. The standing rule earned its keep.
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- The round-1 recipe id `bloom-grade-3` survives but now produces the *item*
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`bloom-grade-3` — the id finally means what it says. The old recipe body moved to
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`tap-bloom`. Nothing outside `data/` referenced it (checked).
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- Container line routes demuxer → gop-assembler → bottler, deliberately **not** through
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the hex splicer, since §4 gates the splicer behind CONTAINER PACK research. Otherwise
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the tech tree eats its own tail.
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- Machine colours are all desaturated industrial per §8 ("ALL saturation belongs to
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media/artifacts"). The items carry the colour; the factory is grime. Two eras get a
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tint where the codex insists: field loom phosphor-green, telecine brass, ASIC
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stream-era white, software decoder hot-red.
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INVENTED: 3 items (`moov-shard`, `offset-ribbon`, `sync-key`), 6 recipes, 2 tech nodes,
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2 commissions. All logged with rationale in `data/CANON-DELTA.md` rather than here.
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BLOCKED/BROKEN:
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- **SIM's M1 chain test is red, and it is not mine.** `sim.test.ts:456` asserts
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`activeCommission === 'first-taste'` after 4000 ticks, but SIM's new queue advances on
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completion, so it reads `dust-allowance`. I confirmed this by stashing my entire round
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2 diff and re-running: identical failure. Their assertion needs updating to their own
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new behaviour — I didn't touch their file. My validator now pins `commissions[0]` as
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`first-taste` so the queue head stays load-bearing for them.
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- `npx tsc --noEmit` reports 2 errors in `src/render/index.ts` (94, 96) from RENDER's
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uncommitted work. Also not mine — a JSON file cannot cause "Expected 3 arguments".
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CROSS-LANE — SIM, two things I need from you:
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1. **Units.** I read `gen`/`draw` as bandwidth **per second** (codex §2 meters read
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kbps). `bufferCap: 240` is built on that. If you integrate per *tick*, my buffer
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number is 30× too small — say so and I'll retune. Arithmetic is in CANON-DELTA.
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2. **Cooling is yours and it doesn't exist yet.** `heatPerTick: 0.0025` makes a software
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decoder throttle at 9.3s and scram at 13.3s of continuous running, which is the codex
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("burst gen ... throttles theatrically"). That only becomes a *mechanic* if something
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cools it; with no cooling it's a one-shot fuse. I assumed ~0.0025/tick while
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scrammed/idle (~50% duty → effective 27/s vs the ASIC's steady 20/s, in the same 2×2
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footprint). Tell me your rate and I'll retune to hit "throttle ~10s, full cycle ~25s".
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**Heads up:** your `meltChain()` reference factory runs on 3 software decoders and no
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ASIC. Once scram lands they will heat in lockstep and black out together every ~13s.
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That's the honest answer to "does anyone dare run two side by side" — but it will slow
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your reference factory, so consider an ASIC base + one decoder for burst, or a buffer
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tank (which is exactly what `bufferCap: 240` is sized to cover: one scram).
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CONTRACT REQUEST: none this round.
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NEXT (candidates): a cooler machine — §2 says heat is "Vented by ASIC coolers", a
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machine the codex names but never specifies, and without it heat has no counterplay;
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mosquito traps (unblocks `vaporwave-sunset`); reel + broadcast era tech; the muxer and
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the moov brain's four sub-lines (§7); cinema-pack when the Fortress exists.
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