trellis_sparse_mrp_mlx/trellis_sparse_mlx.egg-info/PKG-INFO
John 15a5e74434 Split VarLenTensor / SparseTensor to match Pixal3D's hierarchy
Pixal3D refactored the container into a VarLenTensor base (feats + explicit
slice-per-batch layout, no coords) with SparseTensor(VarLenTensor) adding
coordinates. LATO.2 has only the combined class. Modelling the split here means one
package serves both without either port adapting at every call site.

Also exposes Pixal3D's cache spelling (get/register_spatial_cache) alongside LATO.2's
(cache_get/cache_put). 13/13 tests unchanged.
2026-08-02 10:35:22 +10:00

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Metadata-Version: 2.4
Name: trellis-sparse-mlx
Version: 0.1.0
Summary: MLX implementation of the TRELLIS-lineage sparse module (SubMConv3d et al) for Apple Silicon
License: MIT
Requires-Python: >=3.10
Requires-Dist: mlx>=0.20
Requires-Dist: numpy>=1.24