monster/trellis_sparse_mrp_mlx
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trellis_sparse_mrp_mlx/tests
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John 70cd436eb9 Shared TRELLIS-lineage sparse core in MLX 
Extracted from lato.2_mrp_mlx. The same sparse module underlies LATO.2, Pixal3D and
the rest of the TRELLIS.2 family, and all of them are blocked on Apple Silicon by the
same single op - submanifold conv - so it belongs in one tested package rather than
vendored per port.

13/13 tests: 7 for the conv against a hand-written reference (spconv is uninstallable
here so there is no upstream oracle), 6 for the remaining layers against torch.

SubMConv3d runs 13.8ms at 128^3/128ch on m3ultra, 5.9x faster than the obvious
per-offset loop.
2026-08-02 10:31:07 +10:00
..
test_ops.py Shared TRELLIS-lineage sparse core in MLX 2026-08-02 10:31:07 +10:00
test_sparse.py Shared TRELLIS-lineage sparse core in MLX 2026-08-02 10:31:07 +10:00