trellis-2-mrp-mlx/trellis2
Pedro Augusto 2b33c15277 sparse/attention: drop FUSED_ATTN_MAX_SEQLEN threshold to match CUDA-path precedent
The 256-cap inside the flex_gemm_sparse_attn branch was a hold-over from
the early naive Metal kernel (round 3). The current backend is flash-
attention-v2 with simdgroup matmul + simd-shuffle softmax row reductions
and wins at every measured shape including max_seqlen=2048. The CUDA
backends above (xformers / flash_attn / flash_attn_3) never fork on
max_seqlen — match that precedent.

Safety-valve preserved as FLEX_GEMM_ATTN_MAX_SEQLEN=N env var: when set,
falls back to SDPA-padded above the cap. Useful only on PyTorch builds
where the Accelerate-SDPA-CPU-bounce happens to win at a specific shape
(measured crossover sits beyond 768 on fp32, higher on fp16).
2026-07-17 07:51:05 +03:00
..
datasets Release Training Code 2026-01-10 09:47:30 +00:00
models Release Training Code 2026-01-10 09:47:30 +00:00
modules sparse/attention: drop FUSED_ATTN_MAX_SEQLEN threshold to match CUDA-path precedent 2026-07-17 07:51:05 +03:00
pipelines add mlx backend for apple silicon with metal gpu acceleration 2026-07-17 07:51:05 +03:00
renderers add mlx backend for apple silicon with metal gpu acceleration 2026-07-17 07:51:05 +03:00
representations add mlx backend for apple silicon with metal gpu acceleration 2026-07-17 07:51:05 +03:00
trainers Release Training Code 2026-01-10 09:47:30 +00:00
utils add mlx backend for apple silicon with metal gpu acceleration 2026-07-17 07:51:05 +03:00
__init__.py Init Release 2025-12-16 19:00:42 +00:00
backends.py add mlx backend for apple silicon with metal gpu acceleration 2026-07-17 07:51:05 +03:00