corridorkey-mrp-mlx/docs/plans
cmoyates 830e88f050
docs: add brainstorm + plan for MLX memory optimizations
bf16 mixed precision, batched decoder upsample, deterministic GC pipeline.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
2026-03-08 21:12:59 -02:30
..
2026-03-01-feat-2048-smoke-test-plan.md feat: add 2048 smoke test for native-resolution validation 2026-03-01 07:04:28 -03:30
2026-03-01-feat-corridorkey-mlx-inference-port-plan.md feat(phase6): optimization, benchmarking, and tiled inference 2026-03-01 06:24:10 -03:30
2026-03-01-feat-engine-integration-surface-plan.md feat: add CorridorKeyMLXEngine integration surface 2026-03-01 06:43:07 -03:30
2026-03-01-fix-converter-review-feedback-plan.md feat(phase3): PyTorch→MLX weight converter (#1) 2026-03-01 05:16:56 -03:30
2026-03-01-phase4-hiera-backbone-plan.md feat(phase4): MLX Hiera backbone port (#2) 2026-03-01 05:55:24 -03:30
2026-03-03-refactor-deep-modules-plan.md docs: add deep modules refactor plan 2026-03-03 09:45:43 -03:30
2026-03-08-feat-mlx-memory-optimizations-plan.md docs: add brainstorm + plan for MLX memory optimizations 2026-03-08 21:12:59 -02:30